A 64-bit computer^Wcalculator design

In my public key cryptography project, this is deadly needed: non-electrical manual computer^Wcalculator, so that I can manually compute digital signature.

Here is a figure to show the basic design of its register of 64-bit.

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|-----------------------------------------------|
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It's 3-3 abacus. You may know that Japanese abacus adopts 1-4 system, while Chinese abacus adopts 2-5 system.

A single column can represent a single hex digit, namely, 0 to F. It has sixteen columns. Because a single column can hold 4-bit value, the register can hold 64-bit value.

Here is an example figure of 64-bit of 0x0123456789ABCDEF.

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|<> <> <> <> <> <> <> <>             <> <> <> <>|
|<> <> <> <>             <> <> <> <> <> <> <> <>|
|            <> <> <> <> <> <> <> <> <> <> <> <>|
|-----------------------------------------------|
|   <> <> <>    <> <> <>    <> <> <>    <> <> <>|
|<>    <> <> <>    <> <> <>    <> <> <>    <> <>|
|<> <>    <> <> <>    <> <> <>    <> <> <>    <>|
|<> <> <>    <> <> <>    <> <> <>    <> <> <>   |
+-----------------------------------------------+
  0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F

For people who are familiar to Japanese or Chinese abacus, it would be obvious and we wouldn't need any further explanation.

I wonder if there is good way to teach this number system.